1. Field of the Invention
The present invention relates to a system for a read (including a verify read) of a nonvolatile semiconductor memory device.
2. Description of the Related Art
In the nonvolatile semiconductor memory device represented by a NAND type flash memory, for instance, write is performed by entrapping electrons in a floating gate electrode or an insulating film as a charge storage layer with a high electric field exerted, followed by varying a threshold voltage of the memory cell.
Here, state of the memory cell after write is expressed with threshold distributions. That is, for a binary memory, two threshold distributions exist, while, for a multi-level memory which stores three levels or more in the memory cell, the threshold distributions exist by the number of values which are stored in the memory cell.
The multi-level memory has been attracting attention as a technique for achieving increase in a memory capacity without increasing cell size in a state that limitation of the cell size is indicated.
However, as the number of values stored in the memory cell increases, control to narrow the threshold distributions becomes necessary. In addition, an interval between the threshold distributions is narrowed and also retention margin is narrowed, so that characteristics relating to data retention of the memory cell deteriorate.
By increasing the write potential and the read potential, a range for arranging the plurality of threshold distributions becomes wide, however, it has a limitation. In addition, when increasing the write potential and the read potential, disturb occurs at the time of write and at the time of read, and this becomes the cause of write errors and read errors.
Meanwhile, it is general for arrangement of the threshold distributions to set one threshold distribution (erase state) to a negative region lower than 0V, and to set remaining plural threshold distributions (write states) to a positive region higher than 0V.
Consequently, instead of such general technique, investigated is a technique for widening the retention margin while arranging some of the plurality of threshold distributions with the write state at present to the negative region (for instance, refer to Jpn. Pat. Appln. KOKAI Publication No. 11-96777).
In order to realize this technique, development of a system for a read (including a verify read) is indispensable, for discriminating the plurality of threshold distributions existing in the negative region.
For instance, according to the read system providing negative potentials to word lines, it is possible to discriminate the plurality of threshold distributions existing in the negative region. However, in that case, since it becomes necessary for the device to modify configuration of the well in which the word line driver is formed, so as to be able to transfer the negative potential, process cost increases.
In addition, according to the read system providing a bias to bit lines, cell sources and cell wells, it is possible to discriminate the plurality of threshold distributions existing in the negative region without providing the negative potentials to the word lines (by using only positive potentials). However, when biasing bit lines to potentials more than the source potential, a separate booster applying a bias to bit lines becomes necessary, and therefore, chip areas increase by the corresponding amount.